#ifndef REG_BASE_ADDR_H_
#define REG_BASE_ADDR_H_

#ifdef __cplusplus
extern "C" {
#endif

#define SPI2_BASE_ADDR (0x40087400)
#define SPI3_BASE_ADDR (0x40087800)

#define I2C1_BASE_ADDR (0x40083000)
#define I2C2_BASE_ADDR (0x40083400)
#define I2C3_BASE_ADDR (0x40083800)

#define UART1_BASE_ADDR (0x40085000)
#define UART2_BASE_ADDR (0x40085400)
#define UART3_BASE_ADDR (0x40085800)
#define UART4_BASE_ADDR (0x40085C00)
#define UART5_BASE_ADDR (0x40086000)

#define LSBSTIM_BASE_ADDR (0x40080000)
#define LSGPTIMA_BASE_ADDR (0x40080400)
#define LSGPTIMB_BASE_ADDR (0x40080800)
#define LSGPTIMC_BASE_ADDR (0x40080C00)
#define LSADTIM1_BASE_ADDR (0x40081000)
#define LSADTIM2_BASE_ADDR (0x40081400)

#define DMAC1_BASE_ADDR (0x40002000)

#define LSADC1_BASE_ADDR (0x40089000)

#define LSADC2_BASE_ADDR (0x40089400)

#define CACHE_BASE_ADDR (0x4000A000)

#define CALC_BASE_ADDR (0x40009000)

#define LSQSPIV2_BASE_ADDR (0x40000000)

#define LSQSPI_MEM_MAP_BASE_ADDR (0x00800000)

#define FLASH_BASE_ADDR (LSQSPI_MEM_MAP_BASE_ADDR)

#define LSPDM_BASE_ADDR (0x4008A000)

#define LSIWDG_BASE_ADDR (0x4000F120)

#define LSRTC_BASE_ADDR (0x4000F140)

#define LSSSI_BASE_ADDR (0x40087000)

#define LSTRNG_BASE_ADDR (0x4008CC00)

#define LSPIS_BASE_ADDR (0x4008C400)

#define LSCRYPT_BASE_ADDR (0x40008000)

#define LSSHA_BASE_ADDR (0x4000E400)

#define LSSM4_BASE_ADDR (0x4000EC00)

#define LSCRC_BASE_ADDR (0x4000B000)

#define LSUSB_BASE_ADDR (0x40001000)

#define SYSC_CPU_BASE_ADDR (0x4000C000)

#define SYSC_AWO_BASE_ADDR (0x4000D000)

#define BXCAN_BASE_ADDR (0x4000E000)

#define LSECC_BASE_ADDR (0x4000E800)

#define APBIF_V33_BASE_ADDR (0x4000F000)

#define LSEXT_INTR_BASE_ADDR (0x4008B000)

#define LSWWDT_BASE_ADDR (0x4008C000)

#define LSTOUCHKEY_BASE_ADDR (0x4008C800)

#define LSSYSC_PER_BASE_ADDR (0x4008D000)

#define LSDAC_BASE_ADDR (0x4008D400)

#ifdef __cplusplus
}
#endif

#endif